Bus error with new gpc snapshot

[Adriaan van Os]

Adriaan van Os wrote:
> Russell Whitaker wrote:
>>>> I suppose this is a back-end bug, reproducible on other platforms.
>>>>
>>>
>>> I can not reproduce this on Amd64 Linux (tried verious option incuding
>>> -fPIC).  I will try i386 Linux, but it looks that the program uses 
>>> features
>>> that Apple decided to implement in its own way.
>>>
>> On linux i686, compiles & runs ok.
> 
> Thanks for trying this out on other platforms. Looking into this 
> further, the cause seems to be a curious miscalculation of record sizes.

The temporary workaround seems to be to pass --maximum-field-alignment=n, where n is anything 
except the default n=0.

[p17:~/gpc/testgpc/adriaan] adriaan% gpc schorn1.pas --maximum-field-alignment=1
[p17:~/gpc/testgpc/adriaan] adriaan% ./a.out
access z before
z is true
[p17:~/gpc/testgpc/adriaan] adriaan% gpc schorn1.pas --maximum-field-alignment=2
[p17:~/gpc/testgpc/adriaan] adriaan% ./a.out
access z before
z is true
[p17:~/gpc/testgpc/adriaan] adriaan% gpc schorn1.pas --maximum-field-alignment=4
[p17:~/gpc/testgpc/adriaan] adriaan% ./a.out
access z before
z is true
[p17:~/gpc/testgpc/adriaan] adriaan% gpc schorn1.pas --maximum-field-alignment=8
[p17:~/gpc/testgpc/adriaan] adriaan% ./a.out
access z before
z is true
[p17:~/gpc/testgpc/adriaan] adriaan% gpc schorn1.pas --maximum-field-alignment=16
[p17:~/gpc/testgpc/adriaan] adriaan% ./a.out
access z before
z is true
[p17:~/gpc/testgpc/adriaan] adriaan% gpc schorn1.pas --maximum-field-alignment=0
schorn1.pas: In procedure `d':
schorn1.pas:18: error: unable to find a register to spill in class 'CREG'
schorn1.pas:18: error: this is the insn:
(insn 8 7 9 0 (parallel [
             (set (reg:SI 0 ax [73])
                 (const_int 0 [0x0]))
             (set (reg/f:SI 5 di [70])
                 (plus:SI (ashift:SI (reg:SI 0 ax [73])
                         (const_int 2 [0x2]))
                     (reg/f:SI 5 di [70])))
             (set (reg/f:SI 4 si [71])
                 (plus:SI (ashift:SI (reg:SI 0 ax [73])
                         (const_int 2 [0x2]))
                     (reg/f:SI 4 si [71])))
             (set (mem/s/c:BLK (reg/f:SI 5 di [70]) [0 P+0 S48 A128])
                 (mem/s/c:BLK (reg/f:SI 4 si [71]) [0 P+0 S48 A32]))
             (use (reg:SI 0 ax [73]))
             (use (reg:SI 19 dirflag))
         ]) 518 {*rep_movsi} (nil)
     (expr_list:REG_UNUSED (reg/f:SI 4 si [71])
         (expr_list:REG_UNUSED (reg/f:SI 5 di [70])
             (expr_list:REG_UNUSED (reg:SI 0 ax [73])
                 (expr_list:REG_DEAD (reg:SI 19 dirflag)
                     (expr_list:REG_UNUSED (reg/f:SI 4 si [71])
                         (expr_list:REG_UNUSED (reg/f:SI 5 di [70])
                             (expr_list:REG_UNUSED (reg:SI 0 ax [73])
                                 (nil)))))))))
schorn1.pas:18: confused by earlier errors, bailing out

Regards,

Adriaan van Os